Designing embedded applications typically involves analog, digital worlds, and embedded code. To be able to verify the concepts we strive for simulation tools that could verify all the worlds together, not only as a mixed-signal simulation but also to be able to include Verilog, co-simulation with Embedded C/C++ and other languages.
Here we represent how to do a spice simulation using an open-source and free version called ngspice in combination with verilog synthesis software called yosys, Isotel extension which offers simple integration of embedded C/C++ (or other) code, and Isotel ngspice extension for one of the most popular cross-platform software the AutoDesk (CadSoft) Eagle. With the included xspice models one can do a similar to matlab/simulink type of simulation to model a mechanical - mechatronics applications and visualize results with blender.
Provides Isotel d_process for co-simulation of C/C++/python and any other language
Minor patches and is up-to-date with the latest ngspice master branch
ngspice Verilog integration with yosys
ngspice Eagle integration with full mixed-signal support
examples from above articles
Motivation to build a verified standard model library for ngspice